The invention relates to memory devices and more particularly to phase change memory devices and a method for fabricating the same.
Phase change memory devices are non-volatile, highly readable, highly programmable, and require a lower driving voltage/current. Current trends in phase change memory development are to increase cell density and reduce current density thereof.
Phase change material in a phase change memory device has at least two solid phases, a crystalline state and an amorphous state. Transformation between these two phases can be achieved by changing the temperature of the phase change material. The phase change material exhibits different electrical characteristics depending on its state. For example, in its amorphous state the material exhibits a higher resistivity than in the crystalline state. Such phase change material may switch between numerous electrically detectable conditions of varying resistivity on a nanosecond time scale with the input of pico joules of energy. Chalcogenide material is a popular and widely used phase change material in modern phase change memory technology.
Since phase change material allows a reversible phase transformation, memory bit status can be distinguished by determining the phase of phase change material in the memory bit.
FIG. 1 is a schematic diagram of a cross section of a conventional phase change memory cell, in which the phase change memory cell includes a bottom electrode 12 formed over a substrate 10. The bottom electrode 12 is disposed over an insulating layer (not shown) formed over the substrate 10. An insulating layer 14 is formed over the substrate 10, having a heating electrode 16 formed in a part therein. Another insulating layer 18 is formed over the insulating layer 14, having a phase change material layer 20 formed in a part therein. The phase change material layer 20 penetrates the insulating layer 18 and partially contacts the heating electrode 16 thereunder. A top electrode 22 is formed over the insulating layer 18 and contacts a top surface of the phase change material layer 20. In FIG. 1, the heating electrode 16 is formed as an electrode of a plug configuration, having a diameter D1. Thus, the heating electrode 16 and the phase change material layer 20 formed thereover have a contact surface of about πD12/4 therebetween. FIG. 2 is a schematic diagram showing a top view of the phase change memory cell illustrated in FIG. 1 but without the top electrode 22. FIG. 1 is a cross section taken along line 1-1 in FIG. 2.
During writing mode, currents are generated by the heating electrode 16 to heat an interface between the phase change material layer 20 and the heating electrode 16, thereby transforming a portion (not shown) of the phase change material layer 20 into amorphous phase or crystalline phase depending on currents through the heating electrode 16 and times for heating the phase change material layer 20.
The phase change memory cell illustrated in FIG. 1 has disadvantages such as strong current needed to successfully transform the phase of the phase change materials during writing mode, such that current density applied to the phase change material layer 20 must be increased. One way to increase the current density is to lower the contact surface between the heating electrode 16 and the phase material layer 20 and this is usually achieved by lowering a lateral dimension of the heating electrode 16, such as by lowering the diameter D1 of the heating electrode 16 in FIG. 1.
Nevertheless, reduction of the dimension of the heating electrode 16 is limited by current photolithography ability, limiting size reduction of the heating electrode 16 and increase in current density applied thereto.